Semiconductor memory devices may be categorized as read only memory (ROM) devices or volatile RAM devices such as dynamic random access memory (DRAM) and static random access memory (SRAM). ROM devices can maintain data over time, but have low I/O data rates. RAM devices have high I/O data rates, but gradually lose data over time.
Non-volatile memory devices have an almost unlimited accumulation capacity. There has been increasing demand for flash memory devices such an electrically erasable and programmable ROM having I/O data capabilities. Flash memory is a non-volatile memory medium without damage on the stored data even though power is off. Flash memory has an advantage such as relatively high writing, reading and erasing processing speed. Accordingly, flash memory may be used for PC bias or for storing data in a set-top box, a printer, a network server and also for digital cameras and mobile phones.
Flash memory devices may be categorized as NAND type devices or NOR type devices. NAND flash memory devices may include cell transistors that may be connected in series to form a unit string. The unit strings may be connected in parallel between a bit line and a ground line, thereby allowing high integration. NOR flash memory devices may include cell transistors that may be connected in parallel between a bit line and a ground line, thereby allowing high-speed operation.
As illustrated in example FIG. 1, the structure of a cell array may include an active region in which a channel is formed to generate hot electrons, a floating gate for storing injected hot electrons and a drain contact. According to the structure of the cell array, two gate regions may share one drain contact in a unit cell.
Example FIG. 2 illustrates a cross-sectional view of the unit cell of example FIG. 1 taken along a line A-A′. The unit cell may include tunnel oxide film 101 formed on and/or over semiconductor substrate 100. Floating gate 102 for storing data may be formed on and/or over tunnel oxide film 101. Dielectric film 105 may be formed on and/or overfloating gate 102. Control gate 103 serving as a word line, may be formed on and/or over dielectric film 105. Thus, dielectric film 105 separates floating gate and control gate 103. A pair of spacers 108 having an oxide-nitride (ON) structure may be formed by sequentially coating and etching oxide film 106 and nitride film 107 to separate and protect the gate region. The unit cell may further include a source/drain region formed by ion implantation using spacer 108 as a mask. Interlayer insulating film 109 may be formed on and/or over control gate 103 and spacer 108 using a boron phosphorus silicate glass (BPSG) film or an insulating material such as HDP-USG. Drain contact 110 serving as a bit line contact may be formed to pass through interlayer insulating film 109. Control gate 103 serves as a word line and drain contact 110 serves as a bit line in programming, erasing and reading the unit cell.
As illustrated in example FIG. 3, the unit cell may have sufficient space for forming a contact in a flash memory device of the order of 0.13 um, which is a main type of the NOR type flash memory device. However, as the size of the unit cell is smaller, a distance between the gate regions forming the unit cells may be reduced, thereby generating void 111 after a deposition process for forming interlayer insulating film 109. Void 111 may change the characteristics of the respective cells. When void 111 is generated, there is a problem that the word lines may operate differently. If a metal material such as tungsten (W) is filled after formation of drain contact 110, the tungsten may be diffused into void 111. This may in turn generate a contact bridge phenomenon in which tungsten forms a bridge by another contact. Accordingly, the gate formed in the word line may not operate properly and thus generates an operation error, thereby causing defects in the cell operation.